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Field
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sensors into next-generation mobile communications infrastructures (5G+/6G). Place of work: The work will be developed at the premises of Instituto de Telecomunicações at University of Aveiro, under
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, or thermoelectric) Hands-on experience in knitting technology, pattern optimization, and sensor integration is preferred This is a full-time position within a flagship initiative focused on wearable-embedded embodied
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on applied research in neuromorphic systems across three pillars: sensors, algorithms, and platforms, and will collaborate closely with its partner ICNS at Western Sydney University, which was also established
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Electronic Engineering. The Centre is focused on applied research in neuromorphic systems across three pillars: sensors, algorithms, and platforms, and will collaborate closely with its partner ICNS at Western
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-fields: A. Building piezo-electric motors and piezo-electric scanners operating from 10 mK to 300 K. B. Designing and building multi-contact sample and probe holders. C. Assembling AFM qPlus sensors. D
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undertake research to engineer capillaric microfluidic chips with advanced flow control elements (e.g., timing circuits, self-correcting logic valves). This will include integration of electrochemical sensor
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NeuroVision – Neuromorphic Vision Sensor Data Coding. The project focuses on the development of efficient, low-latency, and scalable coding solutions for event-based (neuromorphic) vision sensors, targeting
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foot-print air pollution sensors that can offer accuracy, robustness, and scalability. About the role The successful candidate will have the opportunity to develop expertise in integrated photonic and
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, advanced sensing techniques, sensor and operational data fusion, data analytics, and machine learning algorithms for condition monitoring, fault diagnosis, and early fault prediction in electric vessels
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electronics for sensor readout systems, including ASIC and SoC design and verification. Strong experience in hardware–firmware co-design for data acquisition and processing pipelines, including FPGA-based