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to open-source hardware and EDA communities. Supervise and mentor PhD students, junior Research Assistants, and Master students. Collaborate with faculty members, graduate students, and external partners
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(PPA) analysis of processor and accelerator designs. Publish research findings in top-tier conferences and journals, and contribute to open-source hardware and EDA communities. Supervise and mentor PhD
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ASCON accelerator within the RISC-V CVA6 core. Investigate and implement RISC-V ISA extensions or custom instructions to support cryptographic operations. Execute the full ASIC design flow using open
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electronics for sensor readout systems, including ASIC and SoC design and verification. Strong experience in hardware–firmware co-design for data acquisition and processing pipelines, including FPGA-based