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Field
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to operate as a passive radar, active radar, communication node and spectrum surveillance tool. FPGA development on the system of each of these modes will be an objective in order to deliver novel research
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Applicants must have a PhD in Computer Engineering, Computer Science, or Electrical and Computer Engineering, and have published their research in prestigious conferences and journals in related
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contract. Expected start: 1 October 2026. PhD enrolment: Université de Lorraine (doctoral school C2MP). The project is part of the ENACT AI Cluster, in the priority area “AI for Engineering and Scientific
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better ways to design neuromorphic or brain-inspired computing systems. These mechanisms must be energy-efficient, reconfigurable, and secure, especially for edge devices. This PhD project focuses
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PhD Positions Application Deadline 3 Mar 2026 - 20:00 (Europe/Paris) Country France Type of Contract Temporary Job Status Full-time Offer Starting Date 1 Apr 2026 Is the job funded through the EU
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techniques enabling full duplex or simultaneous communication–sensing operation Implement the proposed techniques on the 6GSPACE Lab testbeds (SDR/FPGA/RFSoC based platforms and NTN channel emulators
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analysis systems using GPU- and FPGA-supported HPC clusters at large international research facilities such as Effelsberg, SKA, and MeerKAT. The systems developed by the BDG are based on state-of-the-art
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stakeholders. Report research progress and outcomes to the Principal Investigator (PI) and the funding agency. Job Requirements: PhD degree in power electronics engineering or a related field. At least 5 years
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engineering Engineering » Other Physics » Electromagnetism Physics » Applied physics Physics » Other Researcher Profile First Stage Researcher (R1) Positions PhD Positions Application Deadline 24 May 2026 - 23
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PhD students, postdocs, and faculty on joint projects, ensuring experimental results support theoretical work. Co-author scientific publications in IEEE journals and conferences, and contribute to open