Chip-Scale Interconnects for 5G Communications Technology

NIST only participates in the February and August reviews.

The roll out of high-speed, low-latency communications networks is expected to drive economic growth through automation while creating new markets spaces that include self-driving cars and augmented reality. At the hardware level, the most advanced devices will rely on millimeter-wave (30 GHz to 300 GHz) circuits that combine low-cost Si chips with high-speed and energy-efficient InP and GaN chips. This research opportunity at NIST’s Communications Technology Laboratory is focused building the tools and techniques that are required to design, characterize, and optimize interconnects between disparate chip technologies. Applicants will have the opportunity to learn high-demand skills for millimeter-wave technologies including calibration, integrated-circuit design, finite-element simulation, clean-room fabrication, and on-wafer test and measurement.

Ma, X., Orloff, N. D., Little, C. A., Long, C. J., Hanemann, I. E., Liu, S., ... & Hwang, J. C. (2018). A Multistate Single-Connection Calibration for Microwave Microfluidics. IEEE Transactions on Microwave Theory and Techniques, 66(2), 1099-1107.

Chamberlin, R. A., & Williams, D. F. (2018). Measurement and Modeling of Heterogeneous Chip-Scale Interconnections. IEEE Transactions on Microwave Theory and Techniques, 66(12), 5358-5364.