Researcher in framework for FPGA benchmarking of quantized neural networks - TIMA

Updated: about 2 months ago
Location: Grenoble, RHONE ALPES
Job Type: FullTime
Deadline: 03 Mar 2026

10 Feb 2026
Job Information
Organisation/Company

Grenoble INP - Institute of Engineering
Department

Engineering
Research Field

Engineering
Researcher Profile

First Stage Researcher (R1)
Positions

PhD Positions
Application Deadline

3 Mar 2026 - 20:00 (Europe/Paris)
Country

France
Type of Contract

Temporary
Job Status

Full-time
Offer Starting Date

1 Apr 2026
Is the job funded through the EU Research Framework Programme?

Not funded by a EU programme
Is the Job related to staff position within a Research Infrastructure?

No

Offer Description

Development and extension of a benchmarking framework for quantized and pruned neural networks, creation of quantized and pruned demonstration models, reproduction of state of the art, experiments in heterogeneous quantization

Depending on expertise, the candidate will help the team on the following tasks and research areas :

- improve integration of the framework with learning/inference framework (PyTorch, Keras, AIDGE, ...)

- improve implementations of low-level layer implementations

- extend hardware developments to use near-FPGA DDR and HBM memories

- create functional demos using networks of interest (Yolo, Resnets, LLMs, ...)

- create proof-of-concept implementations for compression, heterogeneous quantization, etc

- reproduce state of the art network parameters with extreme quantization and compression of parameters

- design and implement next-generation hardware-friendly inference solutions

- participate to publication and valorization of these works


Where to apply
E-mail

job-ref-42dqy7g9pn@emploi.beetween.com

Requirements
Research Field
Engineering
Education Level
PhD or equivalent

Skills/Qualifications

 - Excellent knowledge in architecture of quantized and pruned neural networks

- Solid programming skills, languages C / C++ / Python

- Solid knowledge in architectures of digital circuits, FPGA would be a plus

- Knowledge in coding and compression of information, or signal processing

- Experience with manipulation and customization of AI training flows

- Experience with RTL languages (Verilog or VHDL), VHDL would be a plus

- Proficiency with English language is highly recommended

- Proficiency with French language would be a plus

- Interest in technologies of microelectronics and problem solving would be appreciated


Specific Requirements

Possibility for remote work 2 days a week


Languages
ENGLISH
Level
Excellent

Languages
FRENCH
Level
Good

Research Field
Engineering
Years of Research Experience
1 - 4

Additional Information
Selection process

Applications must be sent before March 3d to this email address: job-ref-42dqy7g9pn@emploi.beetween.com  


Work Location(s)
Number of offers available
1
Company/Institute
Grenoble INP UGA
Country
France
Geofield


Contact
City

Grenoble
Website

http://www.grenoble-inp.fr
Street

46 avenue Félix Viallet
Postal Code

38000
E-Mail

job-ref-42dqy7g9pn@emploi.beetween.com

STATUS: EXPIRED

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