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Field
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) Rapid Prototyping (3D printing, Raspberry Pi, FPGA) Electrode patterning and cleanroom fabrication techniques Good team player with strong interpersonal skills Entry level applicants will also be
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physics (HEP) detectors, neuromorphic computing, FPGA/ASIC design, and machine learning for edge processing. The successful candidate will work with a multi-institutional and multi-disciplinary team
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, depending on your skills, integrating hardware accelerators (FPGA) into "Hardware-in-the-Loop" simulations. Finally, you will actively participate in the scientific dissemination of the work through the
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Qualifications (optional but advantageous) 1. Experience with FPGA programming (Verilog/VHDL) for real-time data acquisition or signal processing; 2. Familiarity with PCB design and layout (PADS, Altium, KiCad
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programming LAMP stack design and implementation experience Knowledge of GPU and FPGA cluster management Experience with federal research compliance and security requirements Background in AI/ML computing
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for accelerators, such as GPUs or FPGAs. Experience in refactoring or porting large codebases (over 100k source lines of code). Background in supporting scientific code on HPC systems or familiarity with components
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design Electronic CAD software Enclosure design and manufacture Simple coding in C and Java FPGA programing in System Verilog Compensation, Benefits and Position Details Pay Range Minimum: $25.70 hourly
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candidate will have a background in computer networks, network/computer security, microcontroller programing, power systems, electronics, linear circuits, digital circuits and FPGA. Qualifications Required
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platforms, including embedded and edge computing environments (e.g., Jetson, Raspberry Pi, FPGA, neuromorphic chips) Publish results in top-tier journals and present at leading international conferences and
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-voltage laboratory instrumentation, or high-energy detector instrumentation. Experience in at least one of the following areas: FPGA-based digital signal acquisition systems, digital signal processing