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to operate as a passive radar, active radar, communication node and spectrum surveillance tool. FPGA development on the system of each of these modes will be an objective in order to deliver novel research
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topics. Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some
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-level layer implementations - extend hardware developments to use near-FPGA DDR and HBM memories - create functional demos using networks of interest (Yolo, Resnets, LLMs, ...) - create proof-of-concept
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include the development and implementation of control algorithms on FPGA platforms, experimental testing using Hardware-in-the-Loop (HIL) setups, data analysis, and preparation of scientific publications
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Switzerland. Develop a prototype hardware implementation of different signal processing algorithms on FPGA, optimized to significantly improve the resolution of real-time energy measurements made by the ATLAS
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involves: Hardware integration – assembling measurement systems from individual components (e.g., signal generators, spectrum analyzers, antennas, mixers, SDRs, FPGAs, ADCs/DACs) Test system validation
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coarse grained reconfigurable arrays (CGRAs), virtualisation of FPGAs using partial reconfiguration, and accelerator support for machine learning. Postdocs at KAUST enjoy generous salaries and free
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analysis and contribute to research publications Job Requirements: Bachelor’s in electrical and Electronic Engineering, computer engineering, or related field Expertise in embedded system and FPGA
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techniques enabling full duplex or simultaneous communication–sensing operation Implement the proposed techniques on the 6GSPACE Lab testbeds (SDR/FPGA/RFSoC based platforms and NTN channel emulators
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the following areas: Matlab and/or Python proficiency for data processing PCB designing and/or microprocessor programming (ARM) Rapid Prototyping (3D printing, Raspberry Pi, FPGA) Optional experience