42 computer-programmer Fellowship positions at SINGAPORE INSTITUTE OF TECHNOLOGY (SIT)
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Researcher (R1) Application Deadline 20 Feb 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU
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Deadline 20 Feb 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related
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) Application Deadline 1 Mar 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job
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that are relevant to industry demands while working on research projects in SIT. About the DIGNIFIED programme The DIGNIFIED programme is dedicated to developing elderly-friendly, textured modified foods with
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) Application Deadline 14 Feb 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the
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(R1) Application Deadline 1 Mar 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU
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that are relevant to industry demands while working on research projects in SIT. The Future Ship and System Design (FSSD) programme aims to develop strategic and innovative design capabilities for the maritime
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Deadline 14 Feb 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related
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) Application Deadline 18 Feb 2026 - 00:00 (UTC) Country Singapore Type of Contract Other Job Status Full-time Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the
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breakwaters that integrate wave energy converters (WECs) and, tidal energy systems. Optimize design configurations to maximize energy harnessing and wave attenuation. 5. Experimental Testing Plan and conduct