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strong understanding of computer hardware or VLSI design. The selected candidates will contribute to the development of: A Physical-to-Electrical Abstraction and Modeling Engine A Circuit-Level Abstraction
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duration of 4 years that depending on performance and organisational needs, may be extended up to a maximum total duration of 8 years. Description On-board Computers and Data Handling Engineer in the Data
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the position Hands-on hardware experience Experience in the development and verification of space hardware Experience with the design, development and application of relevant tools and methods Understanding
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of the industrial activities by leading the specification, design, procurement, development and verification/acceptance of backend payload hardware and software, including coordination across functional teams, end
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Location ESTEC, Noordwijk, Netherlands ECSAT, Harwell, the United Kingdom Description Lead Telecom Payload Engineer within the LEO Satellites Programme Office in the Satellite Programmes Department
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Location ESRIN, Frascati, Italy Description Vega and Space Rider Mechanical, Thermal, and Pyrotechnics Lead Engineer, in the Flight Programme Department, Directorate of Space Transportation. Under
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computer science, electronics engineering, telecommunications or a related discipline is required for this post. Additional requirements Strong experience in real-time embedded software on space-qualified
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10 Apr 2026 Job Information Organisation/Company Delft University of Technology (TU Delft) Research Field Computer science » Cybernetics Researcher Profile Leading Researcher (R4) Established
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Location ESA Headquarters, Paris, France Description P120C/P160C and Solid Propulsion Programme Manager in the Flight Programmes Department, Directorate of Space Transportation. Under the direct
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. Applicants must be eligible to access information, technology, and hardware which is subject to European or US export control and sanctions regulations. During the recruitment process, the Agency may request