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7th April 2026 Languages English Norsk Bokmål English English Are you interested in large-scale landscape changes and landscape architecture? PhD position within Landscape Architecture – Large-scale
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Computer science » Computer systems Computer science » Programming Technology » Communication technology Technology » Telecommunications technology Researcher Profile First Stage Researcher (R1) Positions PhD
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of Information Security and Communication Technology invites applications for a PhD Research Fellow position in Quantum Internet Architecture and Protocol Stack. The successful candidate will be offered a 4‑year
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that an application for a PhD position at NMBU is at the same time an application for admission to a PhD program at the institution. The documentation that is necessary to ensure that the admission requirements are met
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engineering, building physics, material science, data science, or a related field. Foreign degrees must correspond with the admission criteria for the PhD program. Candidates submitting M.Sc. thesis within 30
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relevant Engineering discipline, or a related field. Foreign degrees must correspond with the admission criteria for the PhD program. Candidates submitting MSc thesis within 30. June 2026 may be considered
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UiA-CERN PhD Position in Multi-robot Mapping and Environmental Data Sharing - Uncertain Environments
UiA. The successful candidate will spend 18 months at UiA followed by 18 months at the BE-CEM group at CERN, while remaining active in the PhD programme at UiA for the full 36 months. The PhD Candidate
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requirements for admission to the Faculty of Engineering doctoral program: PhD in Engineering This position is restricted by acts relating to Control of the Export of Strategic Goods, Services and Technology
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doctoral program: PhD in Engineering This position is restricted by acts relating to Control of the Export of Strategic Goods, Services and Technology. This means that candidates from countries subject to
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seeking a PhD candidate in computer architecture. The research focus of this PhD position is the design of performant and energy-efficient Edge Artificial Intelligence (AI) accelerators. Such accelerators