Sort by
Refine Your Search
-
Listed
-
Category
-
Country
-
Program
-
Employer
- Carnegie Mellon University
- Pennsylvania State University
- National University of Singapore
- CERN - European Organization for Nuclear Research
- UNIVERSIDAD POLITECNICA DE MADRID
- Brookhaven Lab
- Fraunhofer-Gesellschaft
- Ghent University
- INESC ID
- Oak Ridge National Laboratory
- The University of Queensland
- University of Southern California
- ; Manchester Metropolitan University
- ; Xi'an Jiaotong - Liverpool University
- Aston University
- Autonomous University of Madrid (Universidad Autónoma de Madrid)
- Battelle
- Delft University of Technology (TU Delft)
- Forschungszentrum Jülich
- Hochschule München University of Applied Sciences
- Imperial College London
- Inria, the French national research institute for the digital sciences
- Johnson & Wales University
- Lawrence Berkeley National Laboratory
- Macquarie University
- Manchester Metropolitan University
- Max Planck Institute of Molecular Cell Biology and Genetics, Dresden
- Nature Careers
- Princeton University
- Purdue University
- Radboud University
- Radix Trading LLC
- Sheffield Hallam University
- Texas A&m Engineering
- UNIVERSITY OF SURREY
- Ulster University
- University of Birmingham
- University of California Berkeley
- University of Colorado
- University of San Francisco
- University of Twente (UT)
- University of Tübingen
- Virginia Tech
- 33 more »
- « less
-
Field
-
VHDL. Experience with using instrumentation to test, characterize, and debug high-speed analog and digital electronics, including FPGAs and RF. Familiarity with digital signal processing Experience
-
on computer architectures and digital system design with HDLs (Verilog or VHDL). • Embedded systems programming with C/C++ • Digital embedded system design based on microproccesors and microcontrollers
-
Max Planck Institute of Molecular Cell Biology and Genetics, Dresden | Dresden, Sachsen | Germany | about 2 months ago
hardware description language (VHDL, Verilog, …). Our offer Salary corresponding to qualification and experience according to TVöD Bund (German civil service tariff). The initial contract is for 2 years with
-
of experience, or Master’s degree Demonstrated success creating digital designs with Verilog or VHDL Solid understanding of computer architecture Demonstrated skills with scripting, revision control, and
-
(VHSIC) hardware description language (VHDL), and/or digital system design using field-programmable gate array (FPGA). You must have a first degree and a PhD in Electronic Engineering, Electrical
-
of OFDM-based wireless systems. You will be responsible for designing and implementing baseband processing algorithms, creating hardware designs in Verilog and/or VHDL, and utilizing Xilinx tools for FPGA
-
complex robotic systems. Electrical: Knowledge of electronics, PCB design, and Altium design software. Familiarity with VHDL, FPGA, and high-speed circuit design. Experience integrating robotic cable
-
-level knowledge in FPGA/hardware design using hardware description languages and/or high-level synthesis (VHDL, Verilog, Vitis HLS, Vitis), and experience in programming FPGA boards. You have basic
-
(RISC-V ISA) Consolidated knowledge of data-streaming mechanisms Consolidated knowledge in the following programming and hardware description languages: SystemVerilog, VHDL Consolidated experience in
-
Understanding of the hardware/chip development flow Knowledge of electronics, or digital design (VHDL/Verilog) or analogue/RF design Appointment Type: Full-time, fixed term for a period of 2 years. We welcome