Sort by
Refine Your Search
-
Listed
-
Category
-
Country
-
Program
-
Employer
- Carnegie Mellon University
- Nanyang Technological University
- California State University San Marcos
- Delft University of Technology (TU Delft)
- INESC ID
- IMEC
- NTNU Norwegian University of Science and Technology
- New York University
- Northeastern University
- Oak Ridge National Laboratory
- Boise State University
- California State University, Northridge
- European Space Agency
- Fraunhofer-Gesellschaft
- Grenoble INP - Institute of Engineering
- Imperial College London
- NEW YORK UNIVERSITY ABU DHABI
- NTNU - Norwegian University of Science and Technology
- Nicolaus Copernicus Astronomical Center
- The California State University
- The Ohio State University
- UNIVERSIDAD POLITECNICA DE MADRID
- Ulster University
- Universitat de Barcelona
- University of Colorado
- University of Delaware
- University of Southern Denmark
- University of Sydney
- University of Washington
- 19 more »
- « less
-
Field
-
and RTL (Verilog), with High-Level Synthesis (HLS) as a key path from algorithmic/behavioral descriptions to synthesizable implementation. Provide both technical and operational leadership to the group
-
mathematics, computational neuroscience or a closely related field. Experience with software engineering for scientific computing or machine learning (e.g. PyTorch), digital hardware design (e.g. Verilog) and
-
programming language, such as MATLAB, Python, C etc and/or hardware description language such VHDL or Verilog. Excellent communication (both writing and oral) and interpersonal skills. Can work independently or
-
, or related field. You have proficiency in one or more of the following: C, C++, VHDL, Verilog, Python, C#. You’ve built, analyzed, debugged, and/or tested bare-metal systems and are familiar with a CMSIS/HAL
-
research on open-source processor architectures and hardware accelerators, including RISC-V based designs. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware
-
design and EDA research initiatives. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware description languages. Develop and optimize EDA workflows for processor and
-
and hardware accelerators, including RISC-V–based systems. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware description languages. Develop and optimize EDA
-
, or related field. You have proficiency in one or more of the following: C, C++, VHDL, Verilog, Python, C#. You've built, analyzed, debugged, and/or tested bare-metal systems and are familiar with a CMSIS/HAL
-
, VHDL or Verilog. Familiarity with contemporary software frameworks for AI (e.g., PyTorch or ONNX). Norwegian oral language skills. Personal characteristics Working as a Postdoctoral fellow requires that
-
(Robot Simulation & Offline Programming), Microsoft Office Suite Programming Languages: Hardware-Level & Digital Design: Verilog, VHDL, Assembly. Data Science & Machine Learning: Python (Pandas, NumPy