1 verilog positions at University of California

Sort by

Refine Your Search

  • University of California | Lawrence, Kansas | United States | 17 days ago

    , or Matlab/Octave. Strong written and verbal communication skills. Experienced professional with expertise in RTL design (Verilog, SystemVerilog, VHDL), IP integration, simulation, timing closure, and hardware

Enter an email to receive alerts for verilog positions