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Max Planck Institute of Molecular Cell Biology and Genetics, Dresden | Dresden, Sachsen | Germany | about 2 months ago
hardware description language (VHDL, Verilog, …). Our offer Salary corresponding to qualification and experience according to TVöD Bund (German civil service tariff). The initial contract is for 2 years with
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++, Verilog, or scripting to support and enhance capabilities for software defined radios and to satisfy project objectives. Perform analysis and characterization of GPS/GNSS data using established software
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-level knowledge in FPGA/hardware design using hardware description languages and/or high-level synthesis (VHDL, Verilog, Vitis HLS, Vitis), and experience in programming FPGA boards. You have basic
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international degree Preferred qualifications PhD in Astronomy, Physics, or Electrical Engineering. Expertise in electronic circuit design Proficiency with: Linux, Python, C, Verilog, VHDL, CUDA, MATLAB, and
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sponsorship of an employment visa for this opportunity. Knowledge, Skills, and Abilities A published track record of conducting research and applying scientific methods. Mastery of C/C++, Python, Verilog/VHDL
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sponsorship of an employment visa for this opportunity. Knowledge, Skills, and Abilities A published track record of conducting research and applying scientific methods. Mastery of C/C++, Python, Verilog/VHDL
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innovations has been built above openwifi, such as support of synchronization and Time Sensitive Network (TSN), MIMO diversity, for a complete list of publications using openwifi please refer to (https