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Qualifications (optional but advantageous) 1. Experience with FPGA programming (Verilog/VHDL) for real-time data acquisition or signal processing; 2. Familiarity with PCB design and layout (PADS, Altium, KiCad
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years at most): Strong background in digital IC design. Hands-on experience in VLSI design including Cadence Digital IC design tools (Genus and Innovus), Verilog/VHDL, SPICE. Experience in layout design
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device modeling such as memristors and ferroelectric FETs such as with Verilog-A. Minimum Qualifications: Requires a minimum of a Ph.D. or equivalent terminal degree in electrical engineering, computer
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circuit using one or more of the software listed (Cadence; Fluent use of LT-Spice, Verilog-A, Python, ADS, ICCAP, etc.) Know how to perform circuit analysis and characterization Notice of Non-Discrimination