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research on open-source processor architectures and hardware accelerators, including RISC-V based designs. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware
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design and EDA research initiatives. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware description languages. Develop and optimize EDA workflows for processor and
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and hardware accelerators, including RISC-V–based systems. Design, implement, and evaluate digital ICs using Verilog/SystemVerilog and related hardware description languages. Develop and optimize EDA
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. Extensive experience in embedded C/C++ programming for hard real-time systems, including implementation of control algorithms on DSPs and FPGAs. 3–4 years of hands-on experience in VHDL/Verilog programming
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Science, or a closely related discipline. Strong research expertise in RISC-V architecture and processor microarchitecture. Proven experience in digital hardware design using Verilog/SystemVerilog or equivalent