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work with our teams to develop a SPICE model for the Ferroelectric Tunnel Junction (FTJ). Further, it will be programmed with Verilog-A language and integrated with Spectra EDA. What you will do
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discipline Knowledge of Verilog or VHDL Programming skills in C/C++ Independent and self-organizing work style, as well as enjoyment of working in an international environment Good German and/or good
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, information technology or comparable with a master's or diploma degree Good knowledge in analog circuit design methodologies and signal integrity analysis Fundamental expertise in working with Verilog AMS
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engineering a strong background in digital design, hardware description languages (e.g. Verilog, VHDL, SystemC), reconfigurable architectures (e.g. FPGA, CGRA) What we expect from you: above-average degree
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Requirements: excellent university degree (master or comparable) in computer engineering or electrical engineering a strong background in digital design, hardware description languages (e.g. Verilog, VHDL