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of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and
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to an international team a strong background in one or more of the following areas: field programmable gate arrays (FPGAs), hardware description languages (e.g. VHDL or Verilog), high-level synthesis (HLS), artificial
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, information technology or comparable with a master's or diploma degree Good knowledge in analog circuit design methodologies and signal integrity analysis Fundamental expertise in working with Verilog AMS
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of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and