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diverse Formal Methods for maximizing software reliability while minimizing cost. Formal Methods (FMs) are mathematical techniques used to verify the correctness of software systems. While many powerful FMs
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fellow will conduct research on Algorithmic Verification of Database Systems with the Programming Languages, Logic, and Software Security Research Group at Aarhus University. The focus of the position will
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Software Defined Vehicles (SDV). The primary objective is to expand, mature, and industrialize a novel European RISC-V automotive ecosystem that enables next-generation high-performance European automotive
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of control software, and reuse efforts from earlier stages as much as possible. On-the-fly Synthesis and Verification: We develop techniques for the online verification and synthesis of controllers