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Processing (punctuation: 25) Item 03: Experience in: RF design for satellite comm, FPGA programming in VHDL., PCB design for RF (punctuation: 25) Item 04: Personal Interview. The interview will be conducted
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- Experience with RTL languages (Verilog or VHDL), VHDL would be a plus - Proficiency with English language is highly recommended - Proficiency with French language would be a plus - Interest in technologies
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degree in computer science, mechatronics, or electrical engineering. Strong programming skills (C/C++, Python; hardware description languages such as HLS or VHDL are an advantage). Knowledge of computer
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design and digital signal processing. Hands-on RTL design skills (SystemVerilog / Verilog / VHDL) plus scripting (Python / MATLAB / C/C++). Strong command of English. Strong team player with excellent
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at the register-transfer level. Experience of a hardware description language, such as Chisel, VHDL or Verilog. Familiarity with contemporary software frameworks for AI (e.g., PyTorch or ONNX), ideally focusing