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circuit design methodologies and signal integrity analysis Deep understanding of programming languages (Python, C/C++), algorithms, and problem-solving in a dynamic tech landscape Hands-on experience in AI
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, System Verilog and programming by using Perl or Python Preferably circuit and layout design experience in Cadence Virtuoso, Tanner EDA or any other full-custom design tool Strong problem-solving and
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of ASIC/ FPGA SoC architecture and digital design Proficiency in hardware description languages such as System Verilog, Verilog, or VHDL Programming knowledge in Python and C Experience on frontend and
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, Python) Very good written and spoken English skills What you can expect There is the possibility of a PhD. Cooperation with national and international partners. In our institution you will find a