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Instituto Superior de Contabilidade e Administração do Porto do Politécnico do Porto | Portugal | about 17 hours ago
-004StreetRua Jaime Lopes Amorim s/nGeofield Contact State/Province Matosinhos City S. Mamede de Infesta Website http://www.iscap.ipp.pt Street Rua Jaime Lopes Amorim, s/n Postal Code 4465-004 E-Mail secretario
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the grantee. https://www.fct.pt/wp-content/uploads/2025/02/Tabela_valores_SMM_2025.p… SCIENTIFIC SUPERVISION The activity will be supervised by Gonçalo Tavares, Assistant Professor at Instituto Superior Técnico
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monthly bank transfer to a Portuguese bank account, held by the grantee. https://www.fct.pt/wp-content/uploads/2025/02/Tabela_valores_SMM_2025.p… SCIENTIFIC SUPERVISION The activity will be supervised by
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e de Computadores, Rua Dr. Roberto Frias, s/n Contact City Aveiro Website https://www.it.pt/ Street Campus Universitário de Santiago Postal Code 3810-193 STATUS: EXPIRED X (formerly Twitter) Facebook
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lasting six months or more), according to the table of values of monthly allowances, set out in Annex I of Regulation No. 950/2019. (https://www.fct.pt/wp-content/uploads/2025/02/Tabela_valores_SMM_2025.p
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/recrutamento/bolsa-de-investigacao https://www.isa.ulisboa.pt Street Tapada da Ajuda Postal Code 1349-017 Lisboa E-Mail gp@isa.ulisboa.pt STATUS: EXPIRED X (formerly Twitter) Facebook LinkedIn Whatsapp More
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. Assist the research team in the production of reports and research papers. BINDING LEGISLATION Law 40/2004 of 18th of August (Scientific Research Fellow Status) in its current wording. https
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the grantee. https://www.fct.pt/wp-content/uploads/2025/02/Tabela_valores_SMM_2025.p… SCIENTIFIC SUPERVISION The activity will be supervised by: - Pedro Alexandre Simões dos Santos, Associate professor
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Instituto de Geografia e Ordenamento do Território da Universidade de Lisboa | Portugal | 8 days ago
to €1309.64 according to the table of values for scholarships awarded directly by FCT, I.P. in Portugal (https://www.fct.pt/wp-content/uploads/2025/02/Tabela_valores_SMM_2025.p… ). Eligibility criteria
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of this scholarship is the design and implementation of an Error Correction Code (ECC) hardware accelerator component, based on Low Density Parity Codes (LPDC), capable of exploiting co-designed approaches to improve