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research is embedded in the institute’s research programme and you will be encouraged to develop interdisciplinary projects and acquire external research funding. Your key tasks are: Teach, improve and
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Connectivity Department in the Directorate of Connectivity and Secure Communications. The ESA Programme Related to EU Secure Connectivity, hereinafter referred to as “Secure Connectivity”, is intended to support
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Exploration Programmes is a programme directorate within the ESA matrix structure. Through a partnership between humans and robots, D/HRE is dedicated to exploring destinations in space where humans are already
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infrastructure and, as mandated, programme-dedicated infrastructure, as well as FM services, in accordance with specifically agreed customer requirements, and associated budgetary and work plans; . overseeing
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comfortable applying analytical thinking to explore research questions and have programming experience (preferably in Python). You have an affinity with coastal numerical modelling, e.g. AeoLiS, XBeach
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://romeijn.web.rug.nl/paper/2023_romeijn_-_VICI_project_description.pdf ), where you can find a detailed list of planned PhD and postdoc positions. Candidates can freely choose their research topic within the domain
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Connectivity Programme Department (CSC-I) in the Directorate of Connectivity and Secure Communications. The ESA Programme Related to EU Secure Connectivity, hereinafter referred to as “Secure Connectivity
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(Kingdom of the) [map ] Subject Area: Advanced Nearest Neighbour Models for Active Matter Appl Deadline: 2025/09/10 11:59PM (posted 2025/07/14, listed until 2025/09/10) Position Description: Apply Position
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the Directorate of Connectivity and Secure Communications. The ESA Programme Related to EU Secure Connectivity, hereinafter referred to as Secure Connectivity, is intended to support the effective development and
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this initiative, 15 early-stage doctoral candidates (DCs) will be trained through a comprehensive, interdisciplinary program spanning material science, device physics, computer architecture, hardware prototyping