3 rtl Postdoctoral positions

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Postdoc in High-Speed Digital AI-DSP ASIC Design

Delft University of Technology (TU Delft) | Netherlands | 3 months ago

Design & Verification: Develop and verify RTL code in SystemVerilog/Verilog to ensure robust digital VLSI design. Optimization & Physical Implementation: Drive the process from synthesis through place-and
Post-doc Researcher in formal modeling of microarchitectures for timing analysis of embedded systems H/F

CEA | Corbeil Essonnes, le de France | France | about 2 months ago

-V processors. These microarchitectures are generated by a flow from a partner that automatically infers synthesizable Register Transfer Level (RTL) representations of processors from their Instruction
Postdoctoral Research Felllow in FPGAs and Networks

King Abdullah University of Science and Technology | Saudi Arabia | about 22 hours ago

topics. Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some

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