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energy-efficient CMOS blocks implementing SSM-based LLMs. Prototype hardware blocks on FPGA and prepare for ASIC tape-out. Benchmark performance and comparison with transformer accelerators. Work with
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, two Assistant Professors, a Lab Manager, a Center Administrator, and approximately 10–15 PhD students, postdocs, and visiting scientists. Several POLIMA researchers have attracted prestigious personal
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CMOS analog/mixed-signal circuits (Cadence, Spectre, etc.) Optimize circuits for power, noise, and area constraints Prototype and validate circuits with EEG signals and wearable sensors Collaborate with
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