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. The goal is to enable autonomous placement of the probe on predefined cardiac views as required in a standard echocardiographic examination. This should be accomplished by combining advanced medical image
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energy-efficient CMOS blocks implementing SSM-based LLMs. Prototype hardware blocks on FPGA and prepare for ASIC tape-out. Benchmark performance and comparison with transformer accelerators. Work with
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CMOS analog/mixed-signal circuits (Cadence, Spectre, etc.) Optimize circuits for power, noise, and area constraints Prototype and validate circuits with EEG signals and wearable sensors Collaborate with
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