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techniques enabling full duplex or simultaneous communication–sensing operation Implement the proposed techniques on the 6GSPACE Lab testbeds (SDR/FPGA/RFSoC based platforms and NTN channel emulators
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(Netherlands) on PIC packaging, PCB, and FPGA development. Working with IMEC (Belgium) on integrating multi-wavelength light sources into the PCB platform. Working with TU Eindhoven (Netherlands) on interfacing
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. The work will be part of a European project on the creation of a secure chip for IoT systems and in collaboration with the phd student that work on the project for two years now. The main objective
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synchronization techniques enabling full duplex or simultaneous communication-sensing operation Implement the proposed techniques on the 6GSPACE Lab testbeds (SDR/FPGA/RFSoC based platforms and NTN channel
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conferences. Contributing to the supervision of PhD students and the coordination with collaborating researchers. We are seeking a researcher with strong experience in experimental quantum optics and a clear
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. The successful candidate is expected to co-supervise a PhD student working in this project. We are looking for candidates who have: a completed PhD degree in physics, electrical engineering or similar field
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exposing hardware accelerators, such as GPUs and FPGAs, in a seamless and portable way. This includes designing execution logic and resource-scheduling strategies that make efficient use of available
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/Qualifications Candidates must have obtained their PhD in computer science or electronics with a specialization in embedded systems or hardware design within the last three years. · Solid background in
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. The successful candidate is expected to co-supervise a PhD student working in this project. We are looking for candidates who have: a completed PhD degree in physics, electrical engineering or similar field
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tasks across distributed infrastructures. A key aspect of the position involves integrating and exposing hardware accelerators, such as GPUs and FPGAs, in a seamless and portable way. This includes