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Field
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Reconfigurable/Spatial computing architectures, such as FPGAs, CGRAs, and AI accelerators, offer significant opportunities for improving performance and energy efficiency compared to traditional CPUs
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(e.g., hardware trojans, side-channel exposure). Co-develop testbenches for hardware simulations and chiplet-level threat modelling. Collaborate closely with FPGA and IC prototyping teams to deploy AI
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, 120-128. Basic Qualifications A PhD (or equivalent), or near completion, in a relevant field such as chemistry, physics, materials science, or engineering (chemical, electrical, or mechanical
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obtaining, a PhD in computer science, engineering, mathematics, or a related physical sciences discipline, with research expertise in areas such as hardware-aware AI security, approximate computing, or secure
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. The research will bridge both established and emerging technical expertise within the section, encompassing areas such as FPGA and neuromorphic computing, Edge AI, machine learning, power electronics, and self
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signal processing algorithms on FPGA, optimized to significantly improve the resolution of real-time energy measurements made by the ATLAS Liquid Argon Calorimeter system. Use novel high-level synthesis
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, candidate must demonstrate that they meet the following essential criteria: Hold, or about to obtain, a PhD in Power Electronics, Electronic/Electrical Engineering or closely related discipline. Recent
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implementing quality assurance and quality control (QA/QC) test Designing testbenches, and contributing to firmware programming for state-of-the-art FPGA architectures, primarily Intel FPGAs. Collaborating
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of using FPGA tools and provide them the necessary training to use the ASIC tools. The team at Cambridge consists of three investigators: Prof. Robert Mullins (PI), Prof. Timothy Jones and Dr Rika Antonova
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, PSIM, Proteus, LabVIEW, SketchUp, SolidWorks, etc. Knowledge of microcontrollers, STM32, FPGAs, etc. Knowledge of communication protocols such as I2C, SPI, Profibus, Modbus, CAN, MQTT, and HTTP