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Field
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implementation, including FPGA controlling Additional Information Selection process The selection process consists of an initial evaluation of the candidates' CV, motivation letter and specific merits
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processes. Performing benchmarks in HPC machines in Japan and carrying optimizations to improve performance of the codes. Execution of simulations in top HPC facilities, both in Europe and Japan. Contribution
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light sources, quantum frequency conversion and quantum processing nodes. The current position will be within a project aiming at developing quantum network nodes with laser cooled atoms, including highly
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for information and communication technologies, in particular displays, image sensors and secure communications. The main drive of the group is to carry out applied research which bridges academia and industry, by
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, fluorescence screening, RNA footprinting and computational methods to study the atomic structure and dynamics of the RRE, identify new antiviral candidates and guide the optimization process. The publication
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for more than 12 months in the 36 months immediately before the call deadline are not elligible. Compulsory national service, short stays such as holidays and time spent as part of a procedure for obtaining
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, including appropriate qualifications and language level. Evaluation will follow the official criteria (academic record, professional experience, training, publications, and interview). Selection process Merit
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evaluation and development of novel PEC systems. · Design and implement in-situ TEM experiments using the available gas and liquid sample holders to study dynamic processes in real-time, under controlled
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process your personal data, as the controller, to apply for the position, maintain communication concerning the status of the candidature, to access the delivered CV; to compare that your data is in
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quantum memories, quantum light sources, quantum frequency conversion and quantum processing nodes. The current positions will be within a project aiming at developing quantum repeaters using solid-state