Sort by
Refine Your Search
-
Listed
-
Employer
-
Field
-
research on biomedical sensor applications (biomedical sensor interfaces/ integrated mechanical strain sensors) analog/Mixed-Signal Integrated Circuit Design (CMOS, low-power, low-noise design) publication
-
Description The Institute of Radio Frequency Engineering and Electronics conducts research in the field of integrated circuit design in state-of-the-art CMOS and SiGe BiCMOS technologies for various
-
technology, the circuit design of the OLED integration, testing, assembly and interconnection technology to the development of the complete system and application. Here, we are working in the interdisciplinary
-
-time employment. Starting date: 04.03.2025 Job description: The Institute of Radio Frequency Engineering and Electronics conducts research in the field of integrated circuit design in state-of-the-art
-
Description Fully funded (and no tuition) PhD program in genetic, molecular, cellular, circuit based Neuroscience and translational, clinical research in Psychiatry. There is the option for a
-
of integrated circuits (Altium Designer / Cadence Virtuoso) set up experimental systems for memristive circuit measurements and experimental data analysis work in a cross-disciplinary team within the DFG grant
-
The Max Planck Institute for Neurobiology of Behavior – caesar • | Bonn, Nordrhein Westfalen | Germany | about 20 hours ago
environment that provides novel technologies to elucidate the function of brain circuits from molecules to animal behaviour. The comprehensive and diverse expertise of the faculty in the exploration of brain
-
Investigation of learning rules for training networks specifically considering the strong nonlinear dynamics of the neurons Integrated circuit design for the hardware realization of such a network Computational
-
back-end-of-line (BEOL) integration with CMOS circuits. Together with our partners in the BMBF-funded Cluster for Future NeuroSys, phase 2 ( www.neurosys.info ), we aim at the wafer scale deposition
-
. For integrated semiconductor circuits, device scaling has been the key for performance enhancement and energy reduction. However, traditional scaling is reaching its limits. Therefore, the Collaborative Research