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learning through labs. Knowledge of third- and fourth-year university ECE course content. Proficiency in MATLAB, C++, Inventor or other CAD software, SPICE simulation software, and HDL design environment
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microcontroller platforms and FPGAs (with proficiency in HDL such as Verilog) development of hardware control software stacks (with proficiency in C++ and Python) at the level of the system software engineer
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UltraScale+ RFSoC, Altera Cyclone SoC); Good knowledge of C/C++ and familiarity with Verilog/VHDL HDL and communication between FPGA and CPU cores. The experiment control and automation of routine experimental
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Platform) to Oracle Fusion Cloud, including making REST and SOAP, FBDI/HDL File Uploads, and extracting data using Analytics/BI Publisher reports, analysis, and OTBI Reports. Knowledgeable in version control
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Cloud, including making REST and SOAP, FBDI/HDL File Uploads, and extracting data using Analytics/BI Publisher reports, analysis, and OTBI Reports. Knowledgeable in version control with Git and GitLab