Sort by
Refine Your Search
-
Category
-
Country
-
Program
-
Employer
- Rutgers University
- National University of Singapore
- Pennsylvania State University
- ;
- California State University San Marcos
- Fraunhofer-Gesellschaft
- Lawrence Berkeley National Laboratory
- McGill University
- Michigan Technological University
- The University of Queensland
- UiT The Arctic University of Norway
- University of California
- University of Cambridge
- University of Cincinnati
- Virginia Community College
- Virginia Tech
- 6 more »
- « less
-
Field
-
: Responsibilities include, design, develop and implement Oracle HCM Extracts, Fast Formulas, BI Publisher Reports, and HCM Data Loader (HDL) solutions to meet business needs. Support ongoing system optimizations
-
: Responsibilities include, design, develop and implement Oracle HCM Extracts, Fast Formulas, BI Publisher Reports, and HCM Data Loader (HDL) solutions to meet business needs. Support ongoing system optimizations
-
: Responsibilities include, design, develop and implement Oracle HCM Extracts, Fast Formulas, BI Publisher Reports, and HCM Data Loader (HDL) solutions to meet business needs. Support ongoing system optimizations
-
learning through labs. Knowledge of third- and fourth-year university ECE course content. Proficiency in MATLAB, C++, Inventor or other CAD software, SPICE simulation software, and HDL design environment
-
involving the structure, composition, and function of high-density lipoproteins (HDL) as well as defining how proteins work together on the surface of triglyceride-rich lipoproteins to work against
-
. Qualifications: Experience in conceptualizing, designing, implementing, and testing complex firmware projects on state-of-the-art FPGA architectures. Experience with HDL simulation (e.g., Quartus/xcelium/verilator
-
microcontroller platforms and FPGAs (with proficiency in HDL such as Verilog) development of hardware control software stacks (with proficiency in C++ and Python) at the level of the system software engineer
-
enrollment in Master’s/Diploma in electrical engineering or related field Proficient in digital hardware design (HDL: Verilog, VHDL) Experience with FPGA tools (e.g., Vivado) or ASIC backend flows (highly
-
design and develop integrations in Oracle Integration Cloud (or other Integration Platform) to Oracle Fusion Cloud, including making REST and SOAP, FBDI/HDL File Uploads, and extracting data using
-
Platform) to Oracle Fusion Cloud, including making REST and SOAP, FBDI/HDL File Uploads, and extracting data using Analytics/BI Publisher reports, analysis, and OTBI Reports. Knowledgeable in version control