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- Computer Science EE 301: Digital Systems Design with HDL Position: Lecturer - Academic Year Semester: Fall 2025 Days/Times: Varies multiple sections Modality: In-person College: College of Science, Technology
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, FBDI/HDL File Uploads, and extracting data using Analytics/BI Publisher reports, analysis, and OTBI Reports. Knowledgeable in version control with Git and GitLab. Familiar with bug tracking systems (JIRA
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UltraScale+ RFSoC, Altera Cyclone SoC); Good knowledge of C/C++ and familiarity with Verilog/VHDL HDL and communication between FPGA and CPU cores. The experiment control and automation of routine experimental
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with a CardioChek Plus analyler (for Total Cholesterol, HDL, LDL, TRIG, and Glucose), obtaining a manual blood pressure, and measuring weight body composition Other duties (20%) Complete required
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experience includes using MATLAB, GNU Radio, HDL Coder, REDHAWK, XMIDAS, VHDL/Verilog, C++, and/or Python for RF spectrum access applications. (2) Foundation in quantum mechanics, with additional emphases
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: Responsibilities include, design, develop and implement Oracle HCM Extracts, Fast Formulas, BI Publisher Reports, and HCM Data Loader (HDL) solutions to meet business needs. Support ongoing system optimizations
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modifications. Proficiency in HDL languages (Verilog, VHDL, or SystemVerilog) and RTL design. Proficiency in toolchain modification, including the ability to extend assemblers and compilers (GCC, LLVM) for custom