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Field
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environment. The successful candidate will be joining the Optoelectronics group led by Prof. Dr. Valerio Pruneri to focus on FPGA development to implement practical protocols oriented toward the space segment
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. During the project, these modules will be emulated by RF FPGA boards designed at the beginning of the project. The first objective of the project will therefore be to propose a very low cost wireless link
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topics. Candidates should have some experience working with FPGAs as well as an understanding of computer networks. Experience with both RTL and HLS design is favoured. The ideal candidate would have some
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monitoring will also be integrated into this PhD. Thermal prediction models are currently implemented on a Field Programmable Gate Array (FPGA), while the thermal PI controller (which will be further developed
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a suit of fast electronics (FPGA) that will allow the following achievements: 1) To rapidly repeat single-particle experimental dynamical trajectories to gain sufficient counting statistics in order
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a suit of fast electronics (FPGA) that will allow the following achievements: 1) To rapidly repeat single-particle experimental dynamical trajectories to gain sufficient counting statistics in order
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for advanced sensing applications and the design of embedded readout architectures based on FPGAs or microcontrollers for signal acquisition and processing. The activities will include electro-optical and
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Postdoctoral Scholar to join the team. The focus of this role is to contribute to the rapidly evolving quantum computing technologies by developing the FPGA based control systems for a wide range of advanced
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. The focus of this role is to contribute to the rapidly evolving quantum computing technologies by developing the FPGA based control systems for a wide range of advanced qubit technologies, including
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Hardware Engineer in the Data Acquisition Hardware Group who will use your skills architecting, constructing and programming data acquisition hardware systems composed of field programmable gate array (FPGA