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of controlling small quantum computers and memories, we anticipate the development of high-speed event-driven decision making, likely to require the use of FPGAs or CPLD based hardware. In the framework of setting
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preferred; Hands- on experience in one of the following areas and desire to cross the boundaries and learn new things Embedded software development for the FPGA / CPU SoC systems (for example, Zynq 7000, Zynq
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Communications protocols OSI stack UDP/TCP/IP Familiarity with wireless specifications such as cellular(4G/5G)/Wi-Fi (802.11) FPGA development Microcontroller and Digital Signal Processor (DSP) development MATLAB
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implementing quality assurance and quality control (QA/QC) test Designing testbenches, and contributing to firmware programming for state-of-the-art FPGA architectures, primarily Intel FPGAs. Collaborating
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. The research will bridge both established and emerging technical expertise within the section, encompassing areas such as FPGA and neuromorphic computing, Edge AI, machine learning, power electronics, and self
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, or FPGAs control platforms. To be successful at shortlisting stage, please ensure you clearly evidence in your application how you meet the essential and, where applicable, desirable criteria listed in
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, or FPGAs control platforms. To be successful at shortlisting stage, please ensure you clearly evidence in your application how you meet the essential and, where applicable, desirable criteria listed in
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of open firmware. If you have a strong background in FPGA development, system-on-chip architectures, digital signal processing, and an interest in quantum computing research, you have the right skill set to
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out technological research and development (R&D) in the field of integrated circuits (ASICs, ASSPs, FPGAs, microprocessors and microcontrollers). Duties Reporting to the Head of Section and within
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tailored to specific experimental needs and help to set the standard for modular, reusable development of “open firmware”. If you have a strong background in FPGA development, system-on-chip architectures