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undergraduate students, and technical personnel at the ElectroScience Laboratory (ESL); Leads and advances research and development on systems requiring the use of Field Programmable Gate Arrays (FPGAs); designs
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Inria, the French national research institute for the digital sciences | Villeurbanne, Rhone Alpes | France | about 2 months ago
arithmetic cores for FPGAs). The team hosts 6 faculty, 6 PhD students, 3 postdocs, 2 engineer, and multiple research interns. Additional information can be found on team website: https://team.inria.fr/emeraude
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collaboration with multiple tech companies to develop and demonstrate the next generation of free-space optical (FSO) communication systems for satellite communications. Information Satellite-based links
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(e.g., hardware trojans, side-channel exposure). Co-develop testbenches for hardware simulations and chiplet-level threat modelling. Collaborate closely with FPGA and IC prototyping teams to deploy AI
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supervision of Dr. Marwa Chafii on Channel Modeling for integrated sensing and communication (ISAC). Responsibilities: Lead the design, setup, and execution of ISAC channel measurement campaigns across multiple
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related to developing, securing, or using AI chips and workloads, from edge devices to data centers. Topics of interest include, but are not limited to, GPUs, FPGAs, custom accelerators, protecting model IP
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central to developing advanced safety control systems that protect people in complex, high-risk environments, while also leading software development projects that integrate PLCs, FPGAs, and EPICS into next
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PLCs, FPGAs, and EPICS into next-generation accelerator systems. Your work will help shape the future of safety engineering at Berkeley Lab and beyond, with opportunities to collaborate across DOE labs
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for manufacture. Knowledge of FPGA development and hardware description languages such as SystemVerilog or VHDL, with experience in simulation, synthesis, and implementation considered highly desirable
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for integrated sensing and communication (ISAC). Responsibilities: Lead the design, setup, and execution of ISAC channel measurement campaigns across multiple environments, hardware platforms, and frequency bands