1 fpga positions at INESC ID

Public notice for research grant Refª BI|2025/662-Project ATE – Refª C644914747-0000023 - Application submission from 11 to 25-02-2025

INESC ID | Portugal | 3 months ago

. The functionality must be described in Verilog for implementation on Intel/Altera FPGAs. The design must be validated through logic simulation, followed by testing on an FPGA platform. BINDING LEGISLATION Law 40/2004