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. During the project, these modules will be emulated by RF FPGA boards designed at the beginning of the project. The first objective of the project will therefore be to propose a very low cost wireless link
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hardware design and verification (HDL: VHDL/Verilog, simulation tools). · Hands-on experience with FPGA prototyping or hardware/software co-design is highly desirable. · Good communication
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models is desired - Experience with detector (Geant4) and electronics simulation would be beneficial - Experience with FPGA firmware development and familiarity with trigger systems would be beneficial
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