1 fpga-asic-vhdl positions at The University of Western Australia

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Senior Engineer (Firmware and Embedded)

The University of Western Australia | Crawley, Western Australia | Australia | 19 days ago

(MPLAB X IDE, XC compilers) and embedded debugging. Proficient in FPGA development (VHDL/Verilog) and real-time systems (RTOS, baremetal). Strong documentation and version control practices (e.g., Git

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