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energy-efficient CMOS blocks implementing SSM-based LLMs. Prototype hardware blocks on FPGA and prepare for ASIC tape-out. Benchmark performance and comparison with transformer accelerators. Work with
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the professional field. (punctuation: 30) Item 02: Specific SW and HW merits: (1) Proven experience in programming with software development languages such as C, VHDL, Python, etc., in aerospace and defense
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(especially neuromorphic) device, circuit and system design, clean-room fabrication, ferroelectric (or antiferroelectric) materials and devices, memristors, tactile sensors, FPGA/MCU/API development, machine
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-healthcare technologies•Security and privacy in computing systems and IoT•Intelligent wireless communications and networks•Systems-on-chip, FPGA/microcontroller design, real-time systems•Biomedical
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of embedded machine learning, neuromorphic hardware and deep learning accelerators. Want to get more information? Click here. What you will do Responsible for RTL design (VHDL, Verilog) of digital blocks and
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Engineering with excellent grades. Knowledge of Digital/Mixed-Signal Integrated Circuit (IC) design and Computer Architecture. Solid skills in HDL (Verilog, VHDL) and scripting languages (Python, TCL
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Low-power Network Protocols, MAC Layer protocols C/C++, Compilers, Embedded Systems (Optionally) Basic Electronics, PCBs, Circuits, FPGAs Highlights of the position Part of a Marie Skłodowska Curie
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Experience with VLSI design (Cadence tools, Verilog/VHDL, SPICE) Knowledge of neural networks and neuromorphic systems is a strong advantage Good programming skills (e.g., Python, MATLAB) and interest in