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Qualifications: PhD in Electrical and/or Computer Engineering or closely related fields, with demonstrated knowledge and expertise in FPGA Design and signal processing Demonstrated experience with VHDL Hardware
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towards a better solution > Proficiency with Python for unit testing > Experience coding in VHDL /verilog > Used Xilnix and/or Altera FPGAs > Familiar with Modelsim > Previously worked on large FPGA stratix
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using state-of-the-art techniques. Develop bytecode to test and analyze VHDL for FPGAs and ensure hardware interfaces and controls meet the intended design. Who you are You have a BS in Computer
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acquisition for scientific user facilities. Ten or more years leading FPGA firmware development with AMD/Xilinx FPGAs in VHDL with the Vivado tool suite including demonstrated expertise in high-speed data
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using state-of-the-art techniques. Develop bytecode to test and analyze VHDL for FPGAs and ensure hardware interfaces and controls meet the intended design. Who you are You have a BS in Computer
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, methodologies, tools, and techniques to prevent risks and issues, and mitigate those that emerge. Analyze FPGA hardware and software interface specifications described via VHDL or Verilog to ensure it meets
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accelerator applications, especially storage ring lattice and orbit control. Proficient in RTL design (Verilog/SystemVerilog/VHDL), IP integration, simulation, timing closure, and FPGA deployment. Skilled in C
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infrastructure (e.g., OpenStack, OpenShift). Knowledge of sensor electronics, FPGA development (e.g., VHDL), and sensor electronics prototyping. Excellent written and oral communication skills. Motivated self
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/chiplets/interposer/wafer-scale), quantum, superconducting, machine learning, edge computing, and security/privacy in computer architecture. Digital Logic Design and VLSI – including ASIC/FPGA design for
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/chiplets/interposer/wafer-scale), quantum, superconducting, machine learning, edge computing, and security/privacy in computer architecture. Digital Logic Design and VLSI – including ASIC/FPGA design for