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position within a Research Infrastructure? No Offer Description What you will do We are seeking a motivated engineer/ experienced ASIC architect to join our innovative team for definition and delivery
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ASIC architect to join our innovative team for definition and delivery of testchips for new technology pathfinding. You will be involved in the definition and design of demonstrator test chips with focus
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and algorithms for event-based fusion of two physically-colocalized event-based and depth vision sensors, simulate and analyse these models, and explore possibilities to realize them in CMOS ASICs
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recommended. Strong background in computer architectures and embedded platforms (ARM Cortex-M, NPU, FPGA, embedded GPU), e.g., via academic courses and/or project courses Research experience (e.g., through a