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) of the Austrian Academy of Sciences in Vienna (OeAW), Austria is offering a position as Postdoc (f/m/x) on Pixel Sensor Development and Chip/ASIC Design (full-time, 40 hours per week) HEPHY performs a rich
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Requirements: 45% - ASIC design. Simulate, design and develop ASICs for high energy physics applications. Work with ASIC designers at national labs and other collaboration institutions. Prepare tapeouts
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, microelectronics (such as FPGAs and ASICs), Artificial Neural Networks, AI and Machine learning, cubesat activities, wireless technologies and all technologies related to the EEE component family (such as Si
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In-Memory Computing (IMC) ASIC prototype in nano-scale advanced CMOS technology based on spiking neural networks (SNNs) for both training and inference of of LLMs. You will also have the opportunity
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. The project will develop a low-power Neuromorphic In-Memory Computing (IMC) ASIC prototype in nano-scale advanced CMOS technology based on spiking neural networks (SNNs) for both training and inference
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, microelectronics (such as FPGAs and ASICs), Artificial Neural Networks, AI and Machine learning, Cubesat activities, wireless technologies and all technologies related to the EEE component family (such as Si
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, personalhygiene and b asic health andsafety precautions applicable to workin a hospitalWorking knowledge of the organization and physical layout of thehospionsAbility to withstand prolonged standing and
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, microelectronics (such as FPGAs and ASICs), Artificial Neural Networks, AI and Machine learning, Cubesat activities, wireless technologies and all technologies related to the EEE component family (such as Si
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. Minimum Requirements: PhD in Electrical Engineering or related field. Preferred Qualifications: Experience with ASIC and mixed-signal (including PIC) Design for ML/AI applications. Experience in industry