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radar and communication systems. focus primarily on security related topics. contribute to the design of radar ASIC architectures. lead and execute (funded) projects in the security domain. publish in
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position focused on the development of low-power SiPM-based radiation detectors for space missions. The selected candidate will be involved in the data analysis for the quality control of ASICs developed
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-hardware co-design of neural architectures, memory hierarchies, and communication systems Model compression and optimization (pruning, quantization, knowledge distillation) for edge deployment FPGA- and ASIC
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communication skills to collaborate smoothly with international colleagues. Nice to have: Practical experience with machine-learning frameworks (e.g., PyTorch). Prior tape-out experience (ASIC or a complex FPGA
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of Science and Technology (NTNU) for general criteria for the position. Preferred selection criteria Experience with the design and development of computer hardware, for example, FPGA and ASIC prototyping
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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent