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wide range of markets such as automotive, industrial and aerospace. Fraunhofer IPMS has been developing IP cores as well as complete digital and analog ASICs for many years. In this work, Analog to
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enrollment in Master’s/Diploma in electrical engineering or related field Proficient in digital hardware design (HDL: Verilog, VHDL) Experience with FPGA tools (e.g., Vivado) or ASIC backend flows (highly
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ASICs for various types of ultrasound transducers. As part of the ultrasound research, the group designs and characterizes micromachined ultrasonic transducers using a very well-equipped electronic lab
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