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of ASIC/ FPGA SoC architecture and digital design Proficiency in hardware description languages such as System Verilog, Verilog, or VHDL Programming knowledge in Python and C Experience on frontend and
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into the co-design of ultra-low-power AI hardware architectures tailored for edge computing applications. The research aims to develop neuromorphic processors, FPGA/ASIC-based AI accelerators, and intelligent
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. Minimum Requirements: PhD in Electrical Engineering or related field. Preferred Qualifications: Experience with ASIC and mixed-signal (including PIC) Design for ML/AI applications. Experience in industry
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